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| october 2010 doc id 18077 rev 1 1/29 29 hvled805 off-line led driver with primary-sensing features 800 v, avalanche rugged internal power mosfet 5% accuracy on constant led output current with primary control optocoupler not needed quasi-resonant (qr) zero voltage switching (zvs) operation internal hv start-up circuit open or short led string management automatic self supply input voltage feed-forward for mains independent cc regulation applications ac-dc led driver applications led retrofit lamps (i.e. e27, gu10) table 1. device summary order codes package packaging hvled805 so16n tube HVLED805TR tape and reel so16n figure 1. application diagram rdmg rfb ... vin hv start-up & supply logic de mag log ic 3. 3v vref 1v vc vcc dmg rcomp cc omp cled rsens e comp iled gnd source drain led constant current regulation driving logic ocp constant voltage regulation protection & feedforward logic vre f www.st.com
contents hvled805 2/29 doc id 18077 rev 1 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1 power section and gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2 high voltage startup generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.3 secondary side demagnetization detection and triggering block . . . . . . . 15 5.4 constant voltage operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.5 constant current operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.6 voltage feedforward block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.7 burst-mode operation at no load or very light load . . . . . . . . . . . . . . . . . . 22 5.8 soft-start and starter block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.9 hiccup mode ocp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.10 layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 hvled805 description doc id 18077 rev 1 3/29 1 description the hvled805 is a high-voltage primary switcher intended for operating directly from the rectified mains with minimum external parts to provide an efficient, compact and cost effective solution for led driving. it combines a high-performance low-voltage pwm controller chip and an 800v, avalanche-rugged power mosfet, in the same package. the pwm is a current-mode controller ic specifically designed for zvs (zero voltage switching) fly-back led drivers, with constant output current (cc) regulation using primary- sensing feedback. this eliminates the need for the opto-coupler, the secondary voltage reference, as well as the current sense on th e secondary side, still maintaining a good led current accuracy. moreover it guarantees a safe operation when short circuit of one or more leds occurs. in addition, the device can also provide a constant output voltage regulation (cv): it makes the application able to work safely when the led string opens due to a failure. quasi-resonant operation is achieved by means of a transformer demagnetization sensing input that triggers mosfet?s turn-on. this input serves also as both output voltage monitor, to perform cv regulation, and input voltage monitor, to achieve mains-independent cc regulation (line voltage feed forward). the maximum switching frequency is top-limited below 166 khz, so that at medium-light load a special function automatically lowers the operating frequen cy still maintaining the operation as close to zvs as possible. at ve ry light load, the device enters a controlled burst-mode operation that, along with the built-in high-voltage start-up circuit and the low operating current of the device, helps mi nimize the residual input consumption. although an auxiliary winding is required in the transforme r to correctly perform cv/cc regulation, the chip is able to power itself dire ctly from the rectified mains. this is useful especially during cc regulation, where the fly-back voltage generated by the winding drops. in addition to these functions that optimize power handling under different operating conditions, the device offers protection featur es that considerably increase end-product?s safety and reliability: auxiliary winding disc onnection or brownout detection and shorted secondary rectifier or transformer?s saturation detection. all of them are auto restart mode. maximum ratings hvled805 4/29 doc id 18077 rev 1 2 maximum ratings table 2. absolute maximum ratings symbol pin parameter value unit v ds 1,2, 13-16 drain-to-source (ground) voltage -1 to 800 v i d 1,2, 13-16 drain current (1) 1. limited by maximum temperature allowed. 1a e av 1,2, 13-16 single pulse avalanche energy (t j = 25c, i d = 0.7a) 50 mj v cc 3 supply voltage (icc < 25ma) self limiting v i dmg 6 zero current detector current 2 ma v comp 7 analog input -0.3 to 3.6 v p tot power dissipation @t a = 50c 0.9 w t j junction temperature range -40 to 150 c t stg storage temperature -55 to 150 c table 3. thermal data symbol parameter max. value unit r thjp thermal resistance, junction-to-pin 10 c/w r thja thermal resistance, junction-to-ambient 110 hvled805 electrical characteristics doc id 18077 rev 1 5/29 3 electrical characteristics t j = -25 to 125 c, vcc=14 v; unless otherwise specified. table 4. electrical characteristics symbol parameter test condition min. typ. max. unit power section v (br)dss drain-source breakdown i d < 100 a; tj = 25 c 800 v i dss off state drain current v ds = 750v; tj = 125 c (see figure 4 and note) 80 a r ds(on) drain-source on-s tate resistance id=250 ma; tj = 25 c 11 14 id=250 ma; tj = 125 c 28 c oss effective (energy-related) output capacitance (see figure 3 ) high-voltage start-up generator v start min. drain start voltage i charge < 100a 40 50 60 v i charge vcc startup charge current v drain > v start ; vcc hvled805 pin connection doc id 18077 rev 1 7/29 4 pin connection note: the copper area for heat dissipation has to be designed under the drain pins figure 2. pin connection (top view) source source vcc gnd iled dmg comp n.a. n.a. n.a. n.a. n.c. drain drain drain drain 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 pin connection hvled805 8/29 doc id 18077 rev 1 table 5. pin functions n. name function 1, 2 source power section source and input to the pwm comparator. the current flowing in the mosfet is sensed through a resistor connected betwee n the pin and gnd. the resulting voltage is compared with an internal reference (0.75v typ. ) to determine mosfet?s turn-off. the pin is equipped with 250 ns blanking time after the ga te-drive output goes high for improved noise immunity. if a second comparison level located at 1v is exceeded the ic is stopped and restarted after vcc has dropped below 5v. 3vcc supply voltage of the device. an electrolytic capacitor, connected between this pin and ground, is initially charged by the internal high-voltage start-up generator; when the device is running the same generator will keep it charged in case the voltage supplied by the auxiliary winding is not sufficient. this feature is disabled in case a protection is tripped. sometimes a small bypass capacitor (100nf typ.) to gnd might be useful to get a clean bias voltage for the signal part of the ic. 4gnd ground. current return for both the signal part of the ic and the gate drive. all of the ground connections of the bias components should be tied to a trace going to this pin and kept separate from any pulsed current return. 5iled cc regulation loop reference voltage. an external capacitor will be connected between this pin and gnd. an internal circuit develops a vo ltage on this capacitor that is used as the reference for the mosfet?s peak drain curr ent during cc regulation. the voltage is automatically adjusted to keep the average output current constant. 6dmg transformer?s demagnetization sensing for quas i-resonant operation. input/output voltage monitor. a negative-going edge triggers mosfet ?s turn-on. the current sourced by the pin during mosfet?s on-time is monitored to get an image of the input voltage to the converter, in order to compensate the internal delay of the current sensing circuit and achieve a cc regulation independent of the mains voltage. if this current does not exceed 50a, either a floating pin or an abnormally low input voltage is assumed, the device is stopped and restarted after vcc has dropped below 5v. still, the pin voltage is sampled-and-held right at the end of transformer?s demagnetization to get an accurate image of the output voltage to be fed to the inverting input of the internal, transconductance-type, error amplifier, whose non- inverting input is referenced to 2.5v. please note that the maximum i dmg sunk/sourced current has to not exceed 2 ma (amr) in all the vin range conditions. no capacitor is allowed between the pin and the auxiliary transformer. 7comp output of the internal transconductance error amplifier. the compensation network will be placed between this pin and gnd to achieve stability and good dynamic performance of the voltage control loop. 8-11 n.a not available. these pi ns must be left not connected 12 n.c not internally connected. provision for cl earance on the pcb to meet safety requirements. 13 to 16 drain drain connection of the internal power section. the internal high-voltage start-up generator sinks current from this pin as well. pins connect ed to the internal metal frame to facilitate heat dissipation. hvled805 pin connection doc id 18077 rev 1 9/29 note: the measured i dss is the sum between the current across the 12 m ? start-up resistor (62.5 a typ. @ 750 v) and the effective mosfet?s off state drain current figure 3. c oss output capacitance variation figure 4. off state drain and source current test circuit 0 25 50 75 100 125 150 0 100 200 300 400 500 c oss (pf) v ds (v) + - cur re nt control 2.5v vcc drain gnd s our ce il ed com p dmg 14v + - vin 75 0v a idss pin connection hvled805 10/29 doc id 18077 rev 1 figure 5. start-up current test circuit figure 6. quiescent current test circuit + - cur re nt control 2.5v vcc drain gnd s our ce il ed com p dmg 11.8v a icc start-up + - current control 2.5v vcc drain gnd so urce ile d comp dm g 14 v a iq _m ea s + - + - + - 10k 33 k 0.2v 0.8 v 3v 0.11 3v i q = iq_meas - - 100 a 3.3k ? ? hvled805 pin connection doc id 18077 rev 1 11/29 note: the circuit across the dmg pin is used for switch-on synchronization figure 7. operating supply current test circuit + - cu rre nt co ntr ol 2.5 v vcc drain gnd s ou rce il ed co mp dmg 15 v + - 15 0v a icc 1.5k 2w 27 k 220k 10 k 10 k 10 + - + - 5.6 2.8v -5v 50khz figure 8. quiescent current during fault test circuit + - cur re nt control 2.5v vcc drain gnd s our ce il ed com p dmg 14v a iq ( fa u l t ) application information hvled805 12/29 doc id 18077 rev 1 5 application information the hvled805 is an off-line all-primary sensing switching regulator, specific for offline led drivers based on quasi-resonant zvs (zero voltage switching at switch turn-on) flyback topology. depending on converter?s load condition, the device is able to work in different modes ( figure 9 for constant voltage operation): 1. qr mode at heavy load. quasi-resonant operation lies in synchronizing mosfet's turn-on to the transformer?s demagnetization by detecting the resulting negative-going edge of the voltage across any winding of the transformer. then the system works close to the boundary between discontinuous (dcm) and continuous conduction (ccm) of the transformer. as a result, the switching frequency will be different for different line/load conditions (see the hyperbolic-like portion of the curves in figure 9 ). minimum turn-on losses, low emi emission and safe behavior in short circuit are the main benefits of this kind of operation. the resulting constant current mode fixes the average current also in case of a short-circuit failure of one or more leds. 2. valley-skipping mode at medium/ light load. depending on voltage on comp pin, the device defines the maximum operating frequency of the converter. as the load is reduced mosfet?s turn-on will not any more o ccur on the first valley but on the second one, the third one and so on. in this way th e switching frequency will no longer increase (piecewise linear portion in figure 9 ). 3. burst-mode with no or very light load. when the load is extremely light or disconnected, the converter will enter a controlled on/o ff operation with constant peak current. decreasing the load will then re sult in frequency reduction, which can go down even to few hundred hertz, thus minimizing all frequency-related losses and making it easier to comply with energy saving regulations or recommendations. being the peak current very low, no issue of audible noise arises. thanks to this feature, the application is able to safely manage the open circuit caused by an led failure. figure 9. multi-mode operation of hvled805 (constant voltage operation) 0 f sw pinmax input voltage p in f osc burst-mode valley-skipping mode quasi-resonant mode 0 f sw pinmax input voltage p in f osc burst-mode valley-skipping mode quasi-resonant mode 0 f sw pinmax input voltage p in f osc burst-mode valley-skipping mode quasi-resonant mode hvled805 application information doc id 18077 rev 1 13/29 5.1 power section and gate driver the power section guarantees safe avalanche operation within the specified energy rating as well as high dv/dt capability. the power mosfet has a v(br)dss of 800v min. and a typical r dson of 11 . the gate driver of the power mosfet is designed to supply a controlled gate current during both turn-on and turn-off in order to minimize common mode emi. under uvlo conditions an internal pull-down circuit holds the gate low in order to ensure that the power mosfet cannot be turned on accidentally. 5.2 high voltage startup generator figure 10 shows the internal schematic of the high-voltage start-up generator (hv generator). it includes an 800 v-rated n-channel mosfet, whose gate is biased through the series of a 12 m resistor and a 14 v zener diode, with a controlled, temperature- compensated current generator connected to its source. the hv generator input is in common with the drain pin, while its output is the supply pin of the device (vcc). a mains ?uvlo? circuit (separated from the uvlo of the device that sense vcc) keeps the hv generator off if the drain voltage is below v start (50 v typical value). with reference to the timing diagram of figure 11 , when power is applied to the circuit and the voltage on the input bulk capacitor is high enough, the hv generator is sufficiently biased to start operating, thus it will draw about 5.5 ma (typic al) from the bulk capacitor. figure 10. high-voltage start-up generator: internal schematic ic harge ihv co nt ro l ma i ns uv lo vcc_ok hv_en 12 m 14 v s ourc e dr ai n vcc application information hvled805 14/29 doc id 18077 rev 1 most of this current will charge the bypass capacitor connected be tween the vcc pin and ground and make its voltage rise linearly. as the vcc voltage reaches the start-up threshold (13 v typ.) the chip starts operating, the internal power mosfet is enabled to switch and the hv generator is cut off by the vcc_ok signal asserted high. the ic is powered by the energy stored in the vcc capacitor. the chip is able to power itself directly from the rectified mains: when the voltage on the v cc pin falls below vcc restart (10.5v typ.) , during each mosfet?s off-time the hv current generator is turned on and charges the supply capacitor until it reaches the v ccon threshold. in this way, the self-supply circuit develops a voltage high enough to sustain the operation of the device. this feature is useful especially during cc regulation, when the flyback voltage generated by the auxiliary winding alone may not be able to keep vcc above v ccrestart . at converter power-down the system will lose re gulation as soon as the input voltage falls below v start . this prevents converter?s restart attempts and ensures monotonic output voltage decay at system power-down. figure 11. timing diagram: normal power-up and power-down sequences vcc drain vcc on vcc restart t t t t vin v start i charge 5.5 ma t t power-on power-off normal operation cv mode cc mode normal operation vcc drain vcc on vcc restart t t t t vin v start i charge 5.5 ma t t power-on power-off normal operation cv mode cc mode normal operation hvled805 application information doc id 18077 rev 1 15/29 5.3 secondary side demagnetizat ion detection and triggering block the demagnetization detection (dmg) and triggering blocks switch on the power mosfet if a negative-going edge falling below 50 mv is applied to the dmg pin. to do so, the triggering block must be previously armed by a positive-going edge exceeding 100 mv. this feature is used to detect transforme r demagnetization for qr operation, where the signal for the dmg input is ob tained from the transformer?s auxiliary winding used also to supply the ic. the triggering block is blanked after mosfet?s turn-off to prevent any negative-going edge that follows leakage inductance demagnetization from triggering the dmg circuit erroneously. this blanking time is dependent on the voltage on comp pin: it is t blank = 30 s for v comp = 0.9 v, and decreases almost linearly down to t blank = 6 s for v comp = 1.3 v the voltage on the pin is both top and bottom lim ited by a double clamp, as illustrated in the internal diagram of the dmg block of figure 12 . the upper clamp is typically located at 3.3 v, while the lower clamp is located at -60mv. the interface between the pin and the auxiliary winding will be a resistor divider. its resistance ratio as well as the individual resistance values will be properly chosen (see ? section 5.5: constant current operation on page 18 ? and ? section 5.6: voltage feedforward block on page 20 ?. please note that the maximum i dmg sunk/sourced current has to not exceed 2 ma (amr) in all the vin range c onditions. no capacitor is allowed between dmg pin and the auxiliary transformer. the switching frequency is top-limited below 166 khz, as the converter?s operating frequency tends to increase excessively at light load and high input voltage. a starter block is also used to start-up the system, that is, to turn on the mosfet during converter power-up, when no or a too small signal is available on the dmg pin. the starter frequency is 2 khz if comp pin is bel ow burst mode threshold, i.e. 1 v, while it becomes 8 khz if this voltage exceed this value. figure 12. dmg block, triggering block 60 mv dmg clamp bl an ki n g time turn-on lo gi c st ar te r s r q le b + - aux rfb rdmg to dr i ver fr om cc/ c v bl o ck fr om ocp dmg 110mv application information hvled805 16/29 doc id 18077 rev 1 after the first few cycles initiated by the starte r, as the voltage develo ped across the auxiliary winding becomes large enough to arm the dm g circuit, mosfet?s turn-on will start to be locked to transformer demagnetization, hence setting up qr operation. the starter is activated also when the ic is in cc regulation and the output voltage is not high enough to allow the dmg triggering. if the demagnetization completes ? hence a negative-going edge appears on the dmg pin ? after a time exceeding time t blank from the previous turn-on, the mosfet will be turned on again, with some delay to ensure minimum voltage at turn-on. if, instead, the negative- going edge appears before t blank has elapsed, it will be ignored and only the first negative- going edge after t blank will turn-on the mosfet. in this way one or more drain ringing cycles will be skipped (?valley-skipping mode?, figure 13 ) and the switching frequency will be prevented from exceeding 1/t blank . note: that when the system operates in valley skipping-mode, uneven switching cycles may be observed under some line/load conditions, due to the fact that the off-time of the mosfet is allowed to change with discrete steps of one ringing cycle, while the off-time needed for cycle-by-cycle energy balance may fall in between. thus one or more longer switching cycles will be compensated by one or more shorter cycles and vi ce versa. however, this mechanism is absolutely normal and there is no appreciable effect on the performance of the converter or on its output voltage. 5.4 constant voltage operation the ic is specifically desig ned to work in primary regulation and the output voltage is sensed through a voltage partiti on of the auxiliary winding, just before the auxiliary rectifier diode. figure 14 shows the internal schematic of the constant voltage mode and the external connections. figure 13. drain ringing cycle skipping as the load is progressively reduced p in = p in' (limit condition) p in = p in'' < p in' p in = p in''' < p in'' t v ds t fw t osc t v t on t v ds t osc t v ds t osc hvled805 application information doc id 18077 rev 1 17/29 due to the parasitic wires resistanc e, the auxiliary voltage is repr esentative of the output just when the secondary current becomes zero. for this purpose, the signal on dmg pin is sampled-and-held at the end of transformer?s demagnetization to get an accurate image of the output voltage and it is compared with the error amplifier internal reference. during the mosfet?s off-time the leakage inductance resonates with the drain capacitance and a damped oscillation is super imposed on the reflected voltage. the s/h logic is able to discriminate su ch oscillations from the real transformer?s demagnetization. when the dmg logic detects the transformer?s demagnetization, the sampling process stops, the information is frozen and compared with the error amplifier internal reference. the internal error amplifier is a transconductance type and delivers an output current proportional to the voltage unbalance of the two outputs: the output generates the control voltage that is compared with the voltage across the sense resistor, thus modulating the cycle-by-cycle peak drain current. the comp pin is used for the frequency compensation: usually, an rc network, which stabilizes the overall voltage control loop, is connected between this pin and ground. the output voltage can be defined according the formula: equation 1 where n sec and n aux are the secondary and auxiliary turn?s number respectively. the r dmg value can be defined depending on the application parameters (see ? section 5.6: voltage feedforward block on page 20 ? section). figure 14. voltage control principle: internal schematic 2.5v rd mg from rsense aux + - ea r to pwm logic s/ h rf b demag lo gi c + - cv c comp dmg dmg ref out sec aux ref fb r v v n n v r ? ? ? = application information hvled805 18/29 doc id 18077 rev 1 5.5 constant current operation figure 15 presents the pr inciple used for controlling the average output current of the flyback converter. the output voltage of the auxilia ry winding is used by the dema gnetization block to generate the control signal for the mosfet switch q1. a re sistor r in series with it absorbs a current v c /r, where v c is the voltage developed across the capacitor c. the flip-flop?s output is high as long as t he transformer delivers current on secondary side. this is shown in figure 16 . the capacitor c has to be chosen so that its voltage v c can be considered as a constant. since it is charged and discharged by cu rrents in the range of some ten a (i cled is typically 20 a) at the switching frequency rate, a capacitance value in the range 4.7-10 nf is suited for switching fr equencies in the ten khz. the average output current can be expressed as: equation 2 where i s is the secondary peak current, t onsec is the conduction time of the secondary side and t is the switching period. taking into account the transformer ratio n between primary and secondary side, i s can also be expressed is a function of the primary peak current i p : equation 3 as in steady state the average current i c : equation 4 which can be solved for v c : equation 5 where v cled =r ? i led and is internally defined. as v c is fed to the cc comparator, the primary peak current can be expressed as: ? ? ? ? ? ? ? = t t 2 i i onsec s out p s i n i ? = () 0 t r v i t t i onsec c cled onsec cled = ? ? ? ? ? ? ? ? + ? ? onsec cled c t t v v ? = hvled805 application information doc id 18077 rev 1 19/29 equation 6 combining (2), (3) (5) and (6): equation 7 this formula shows that the average output current does not depend anymore on the input or the output voltage, neither on transformer inductance values. the external parameters defining the output current are the transfo rmer ratio n and the sense resistor r sense . figure 15. current control principle sense c p r v i = sense cled out r v 2 n i ? = from rsense . to pwm logic cled rdmg demag logic s r q r rfb iref q1 aux + - cc il ed dmg application information hvled805 20/29 doc id 18077 rev 1 5.6 voltage feedforward block the current control structure uses the voltage v c to define the output current, according to (7). actually, the cc comparator will be affect ed by an internal propagation delay td, which will switch off the mosfet with a peak current than higher the foreseen value. this current overshoo t will be equal to: equation 8 will introduce an error on the calculated cc setpoint, depending on the input voltage. the hvled805 implements a line feedforward function, which solves the issue by introducing an input voltage dependent offset on the current sense signal, in order to adjust the cycle-by-cycle current limitation. the internal schematic is shown in figure 17 . figure 16. constant current operation: switching cycle waveforms t t t t i p i s q i c t r c v cled i ? = cled i in d p p vt i l ? = hvled805 application information doc id 18077 rev 1 21/29 during mosfet?s on-time the current sourced from dmg pin is mirrored inside the ? feedforward logic ? block in order to provide a feedforward current, i ff . such ?feedforward current? is proportional to the input voltage according to the formula: equation 9 where m is the primary-to-auxiliary turns ratio. according to the schematic, the voltage on the non-inve rting comparator will be: equation 10 the offset introduced by feed forward compensation will be: equation 11 as r ff >>r sense , the previous one can be simplified as: equation 12 figure 17. feedforward compensation: internal schematic . cc bl o ck aux rdmg rf b if f rs en s e rff + - cc feedforward logic pw m logic dmg drain so urce dmg in ff r m v i ? = ( ) (-) sense d ff ff sense v=r i+i r+r ?? () sense ff dmg in offset r r r m v v + ? ? = dmg ff in offset r m r v v ? ? = application information hvled805 22/29 doc id 18077 rev 1 this offset is proportional to v in and is used to compensate the current overshoot, according to the formula: equation 13 finally, the r dmg resistor can be calculated as follows: equation 14 in this case the peak drain current does not depend on input voltage anymore. one more consideration concerns the r dmg value: during mosfet?s on-time, the current sourced by the dmg pin, i dmg , is compared with an internal reference current i dmgon (-50 a typical). if i dmg < i dmgon , the brownout function is activated and the ic is shut-down. this feature is especially im portant when the auxilia ry winding is acciden tally disc onnected and considerably increases the en d-product?s safety and reliability. 5.7 burst-mode operation at no load or very light load when the voltage at the comp pin falls 65 mv below a threshold fixed internally at a value, v compbm , the ic is disabled with the mosfet kept in off state and its consumption reduced at a lower value to mi nimize vcc capacitor discharge. in this condition the converter operates in burst-mode (one pulse train every t start =500 s), with minimum energy transfer. as a result of the energy delivery stop, the output voltage decreases: after 500 s the controller switches-on the mosfet again and the sampled voltage on the dmg pin is compared with the internal reference. if the voltage on the ea output, as a result of the comparison, exceeds the v compl threshold, the device restarts switching, otherwise it stays off for another 500 s period. in this way the converter will work in burst-mode with a nearly constant peak current defined by the internal disable level. a load decr ease will then cause a frequ ency reduction, which can go down even to few hundred hertz, thus minimizing all frequency-related losses and making it easier to comply with energy saving regulations. this kind of operation, shown in the timing diagrams of figure 19 along with the others previous ly described, is noise-free since the peak current is low dmg ff in sense p d in r m r v r l t v ? ? = ? ? sense d ff p pri aux dmg r t r l n n r ? ? ? = hvled805 application information doc id 18077 rev 1 23/29 5.8 soft-start and starter block the soft start feature is automatically implem ented by the constant current block, as the primary peak current will be limit ed from the voltage on the c led capacitor. during start-up, as the output voltage is zero, the ic will start in cc mode with no high peak current operations. in this way the voltage on the output capacitor will increase slowly and the soft-start featur e will be ensured. actually the c led value is not important to define the soft-start time, as its duration depends on others circuit parameters, like transformer ratio, sense resistor, output capacitors and load. the user will define the best appropriate value by experiments. 5.9 hiccup mode ocp the device is also protected against short circui t of the secondary rectifier, short circuit on the secondary winding or a hard-saturated flyback transformer. a comparator monitors continuously the voltage on the r sense and activates a protection circuitry if this voltage exceeds 1 v. to distinguish an actual malfunction from a di sturbance (e.g. induced during esd tests), the first time the comparator is tripped the protecti on circuit enters a ?warning state?. if in the subsequent switching cycle the comparator is not tripped, a temporary disturbance is assumed and the protecti on logic will be reset in its idle state; if the comparator will be tripped again a real malfunction is a ssumed and the device will be stopped. this condition is latched as lo ng as the device is supplied. while it is disabled, however, no energy is coming from the self-supply circuit; hence the voltage on the v cc capacitor will decay and cross the uvlo threshold after some time, which clears the latch. the internal start-up generator is still off, then the v cc voltage still needs to go below its restart voltage figure 18. load-dependent operating modes: timing diagrams comp i ds 65 mv hyster. normal-mode burst-mode normal-mode t start t start t start t start v compl application information hvled805 24/29 doc id 18077 rev 1 before the v cc capacitor is char ged again and the device restarted. ultimately, this will result in a low-frequency intermittent operat ion (hiccup-mode operation), with very low stress on the power circuit. th is special condition is illustra ted in the timing diagram of figure 18 . 5.10 layout recommendations a proper printed circuit board layout is essent ial for correct operation of any switch-mode converter and this is true for the hvled805 as well. careful component placing, correct traces routing, appropriate traces widths an d compliance with isolation distances are the major issues. in particular: the compensation network should be connected as close as possible to the comp pin, maintaining the trace for the gnd as short as possible signal ground should be routed separately from power ground, as well from the sense resistor trace. figure 19. hiccup-mode ocp: timing diagram v ds vcc on vcc off vcc rest secondary diode is shorted here t t t v source 1 v two switching cycles v cc vcs dis hvled805 application information doc id 18077 rev 1 25/29 figure 20. suggested routing for converter comp source dr ai n vdd iled gnd dmg hvled805 ... led acin acin package mechanical data hvled805 26/29 doc id 18077 rev 1 6 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions an d product status are available at: www.st.com . ecopack ? is an st trademark. table 6. so16n mechanical data dim. mm inch min typ max min typ max a 1.75 0.069 a1 0.1 0.25 0.004 0.009 a2 1.6 0.063 b 0.35 0.46 0.014 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.020 c1 45 (typ.) d (1) 9.8 10 0.386 0.394 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 f (1) 3.8 4.0 0.150 0.157 g 4.60 5.30 0.181 0.208 l 0.4 1.27 0.150 0.050 m 0.62 0.024 s 8 (max.) hvled805 package mechanical data doc id 18077 rev 1 27/29 figure 21. package dimensions revision history hvled805 28/29 doc id 18077 rev 1 7 revision history table 7. document revision history date revision changes 14-oct-2010 1 initial release hvled805 doc id 18077 rev 1 29/29 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 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